transcript on
if {[file exists rtl_work]} {
	vdel -lib rtl_work -all
}
vlib rtl_work
vmap work rtl_work

vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/LCD_On_FPGA.v}
vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/seg.v}
vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/write_read.v}
vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/picture_ram.v}
vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/top.v}
vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/lcd_init.v}

vlog -vlog01compat -work work +incdir+E:/project/My\ Project/yanjiusheng/LCD/new_LCD/LCD_init {E:/project/My Project/yanjiusheng/LCD/new_LCD/LCD_init/LCD_On_FPGA_tb.v}

vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cyclone10lp_ver -L rtl_work -L work -voptargs="+acc"  LCD_On_FPGA_tb

add wave *
view structure
view signals
run -all
